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ML407-PAM

MultiLane
Clock Synthesiser for Jitter Tolerance Testing | Sinusoidal Jitter Generation| Multi-UI Clock Frequency Modulation 20 MHz to 5.5 GHz Operation | Two Differential Clock Outputs | Low Intrinsic Jitter | FM and PM Modulation |
JTOL Clock Source
  • 0.02 to 5.5 GHz operation
  • Two differential clock outputs
  • Low intrinsic jitter
  • FM and PM Modulation
  • -110 dBc/Hz at 100 kHz

The ML407 is an add-on instrument for the ML4039 BERT series, intended for multi-UI sinusoidal jitter generation. It enables injection of multi-UI sinusoidal jitter, BUJ and random jitter to a clean NRZ or PAM4 signal coming out of the BERT. The ML407-PAM is intended for users seeking to do stressed input testing on their receivers in accordance with e.g. OIF-CEI VSR56 PAM and CAUI-4.

Applications:

ML BERT’s clock source for jitter tolerance testing and general serial data receiver characterisation.

Refer to the datasheet for detailed product specification on the JTOL Clock Source.

Datasheet
Datasheet
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